The present invention relates to a manufacturing technology of a semiconductor device and the semiconductor device. For example, it relates to a technology effectively applied to the semiconductor device in which semiconductor chips are coupled to a chip mounting part through a bonding material such as a solder material.
In a power system semiconductor device, since it is often the case where a strong electric current is applied to a back surface of a semiconductor chip, a solder material (for example, a solder paste) is used as a bonding material (die bonding material) for bonding the semiconductor chip. That is, the semiconductor chip is mounted over an upper surface of a die pad (chip mounting part) through the solder material.
In assembling the semiconductor device, first, a semiconductor wafer is divided by dicing to obtain a plurality of semiconductor chips. Then, picked out semiconductor chips are mounted over the die pad through the solder material. After that, the semiconductor chips and leads are electrically coupled using metal wires, sealed with a resin, and separated from a lead frame to complete the assembly.
For example, Japanese Unexamined Patent Publication No. Hei 10 (1998)-223572 (Patent Document 1) and Japanese Unexamined Patent Publication No. 2009-188148 (Patent Document 2) disclose a technology in which semiconductor chips are obtained from a semiconductor wafer by dicing it and a semiconductor device is manufactured with use of the semiconductor chips.
[Patent Document 1] Japanese Unexamined Patent Publication No. Hei 10 (1998)-223572
[Patent Document 2] Japanese Unexamined Patent Publication No. 2009-188148